CS223 Laboratory Assignment 1

A Two-bit Adder

Lab date and time:

 Tuesday   March 5, 2012,  13:40-16:30 EE 103

Location: EE 103  (in the EE building, on the left side of 1^st floor as you leave the elevator)

Groups: Each student should find a partner and form a 2-person group. The group will work together in the lab. Students who have no lab partner will be assigned one by the TAs.

Preliminary Design Work 

A number of tasks in the today's lab need advance preparation. These advance designs and Verilog models should be prepared in advance with your lab partner, and assembled neatly into a Preliminary Design Report. You should make your report as neat as possible, using A4 paper, with a printed cover page and printed pages for the Verilog codes. Each page of the report should contain just one of the items listed below—do not put more than one design or Verilog code on a page. Each page should have a heading or title that clearly states what is contained on that page. The pages of the report should be stapled together in the upper left-hand corner. If you handwrite anything, it should be neat and legible. All pages, whether printed or handwritten, should have writing only on one side.The contents of the report should be as follows:

(1) A cover page which includes the following (in order from the top): course name and code number, the number of the lab, your group number, the names and ID numbers of each member of the group, and the date of you submit the report.

(2) In Lab #0  you have set up the schematic of a  full adder using the Xilinx software. In this lab you will form the  full adder using the  XOR, AND and OR gates. on the  breadboard. Find the documentation for the IC's and prepare your circuit schematic. The circuit schematic will resemble the logic diagrams, but have all the information needed to actually build the circuit that is the connections between the pins of IC are all indicated in the schematic.

(3)- Prepare the truth table of your  full adder. You will need it to test your circuit on the breadboard.

(4)- In order to have a two bit adder you need another copy of your full adder. Least significant bit  carry(c) will be connected to carryin of  the next adder. Modify your design  and prepare circuit schematic of the full adder. Section 4.3 explains adders. Your design will lbe similar to Fig 4.32 but it will use only the first two full adders.

(Documentation about these ICs is available at http://www.ee.washington.edu/circuit_archive/parts/74ttl/index.html)

Implementation with SSI on the breadboard

1) From the lab technician, get the necessary parts, breadboard, and wires that you will need to build the logic circuit (see IC List below).

2) Using your circuit schematic that you created in the Preliminary Design work, build the circuit, following the Suggestions given in the link. Connect up inputs to switches on the logic board. Connect  leds on the logic board to the outputs of your logic circuit. Don't forget to connect +VCC power and GND ground to the VCC and GND pins on all integrated circuit (IC) packages.

3)Measure the  outputs for each combination of inputs.  Draw the truth table for the 4-input 4-output logic circuit that you have made, and fill in the left-hand (input) side in standard binary counting order. For each row, apply the input combinations by adjusting the switches, and observe the outputs on the leds. Use this information to complete the truth table, filling in the right-hand (output) side.

4) Compare your measured truth table that you just obtained from the circuit, with the actual truth table of the  circuit that you created in step a of the Preliminary Design work.  If there are no discrepancies, then it means that your logic circuit has worked as predicted.  Ask the TA to come and verify this. When the TA has checked your circuit, you are ready to proceed.

5)Using the Xilinx software enter the following Verilog program  to a project  Tester.

module hdrive(
    input clk,
    output [3:0] out
    );
reg[24:0] count;
always @(posedge clk)
count=count+1;

assign out[3]=count[24];
assign out[2]=count[23];
assign out[1]=count[22];
assign out[0]=count[21];
endmodule

Add to this project the following ucf file.(hdrive.ucf)

NET "clk" LOC="B8";
NET "OUT[3]" LOC="B2";
NET "OUT[2]" LOC="A3";
NET "OUT[1]" LOC="J3";
NET "OUT[0]" LOC="B5";

This causes the first 4 pins on the board to generate 0000,0001,0010,......1111, cyclicly. Connect these pins to inputs of your design.

Download both programs to your BASYS board. and observe the outputs of your circuit. on the leds.

Implementation with FPGA board 

a) Using the Schematic Entry capability of Xilinx, create a schematic of your two bit adder.  Use the info in e Quick StartupGuide and  Xilinx ISE In-Depth Tutorial to guide you.

b) Implement the two bit fulladder circuit using the DIGILENT BASYS 2 board, with Xilinx FPGA (field-programmable gate array), following the steps given in the tutorial Quick Starup Guide The information in Chapter 6 “Design Implementation” of the Xilinx ISE In-Depth Tutorial " may be helpful to your understanding.

c) Using the switches as inputs, and the LEDs as outputs, test the circuit you have implemented and obtain the 4-input, 5-output truth table of the function you have built and verify that  iyour two-bit adder calculates the sum of 2  two-bit binary numbers and the carryout. When you have verified the truth table (by checking all input combinations) and know it works correctly, demonstrate your circuit to a TA to get credit.

Cleanup !

Clean up your lab station, and return all the parts, etc.  Throw away any parts that do not work.  Delete the Xilinx Project you created and any files you created today, so that the computer is in the same state that you found it.  Now turn off the computer, and leave your lab workstation for others the way you would like to find it—clean and organized.

NOTES

--Be sure to read and follow the Policies for CS223 labs.