CS491/2 Senior Design Project I/II Details for Current Academic Year (2020-2021) |
Specialized hardware accelerators can significantly improve the performance and power efficiency of computing systems. In this presentation, we will focus on domain-specific hardware. We will discuss the reasons for the emerging hardware accelerators in general. Specifically, we will cover an accelerator for graph analytics applications and propose a configurable architecture template that is specifically optimized for iterative vertex-centric graph applications with irregular access patterns and asymmetric convergence. The proposed architecture addresses the limitations of the existing multi-core CPU and GPU architectures for these types of applications. The SystemC-based template we provide can be customized easily for different vertex-centric applications by inserting application-level data structures and functions.