Publications 

 

Books:

 

MEMORY HIERARCHY DESIGN FOR CHIP MULTIPROCESSORS: A Compiler Directed Approach (Paperback) by Ozcan Ozturk

 

You can access electronic copies of the following papers from DBLP (click the EE link):

 

Journals:

 

1.      Using Data Compression for Increasing Memory System Utilization, by Ozcan Ozturk, Mahmut Kandemir, Mary J. Irwin. IEEE Transactions on Computer Aided Design, Volume 28, Number 6, pages 901-914, June 2009.

2.      ILP Based Energy Minimization Techniques for Banked Memories, by O. Ozturk and M. Kandemir. ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 13 , Issue 3, July 2008.

3.      Access Pattern-Based Code Compression For Memory-Constrained Systems, by O. Ozturk, M. Kandemir, and G. Chen. ACM Transactions on Design Automation of Electronic Systems (TODAES), Volume 13 , Issue 4, September 2008.

4.      Shared scratch pad memory space management across applications, by O. Ozturk, M. Kandemir, S. W. Son, and I. Kolcu. To appear in International Journal of Embedded Systems (To appear in IJES).

5.      Compiler-Directed Energy Optimization for Parallel Disk Based Systems, by S. W. Son, G. Chen, O. Ozturk, M. Kandemir, and A. Choudhary, IEEE Transactions on Parallel and Distributed Systems (TPDS), Volume 18, Number 9, pp. 1241-1257, September, 2007.

6.      Optimizing Array-Intensive Applications for On-ChipMultiprocessors, byI.Kadayif,M.Kandemir,G.Chen,O.Ozturk,M.Karakoy, andU.Sezer. IEEE Transactions on Parallel and DistributedSystems (TPDS), Volume 16, Number 5, May 2005.

7.      An ILP formulation for task scheduling on heterogeneous chip multiprocessors, by S. Tosun, N. Mansouri, and M. Kandemir. Lecture Notes in Computer Science (LNCS) 4263 Springer 2006, ISBN 3-540-47242-8.

8.      An ILP-Based Approach to Locality Optimization, by G. Chen, O. Ozturk, and M. Kandemir. Lecture Notes in Computer Science (LNCS) 3602 Springer 2004, Languages and Compilers for High Performance Computing, pages 149-163.

9.      Using data compression to increase energy savings in multi-bank memories, by M.Kandemir,O.Ozturk, M.J.Irwin, and I.Kolcu. Lecture Notes in Computer Science (LNCS) 3149Springer 2004, ISBN 3-540-22924-8, pages 310-317.

 

 

Conferences:

 

1.      Multicore Education Through Simulation, Ozcan Ozturk. In Proc. Of Microelectronic Systems Education (MSE’09), July 2009, San Francisco, CA.

2.      Dynamic Thread and Data Mapping for NoC Based CMPs, Mahmut Kandemir, Ozcan Ozturk, and S.P.Muralidhara. In Proc. of 46th Design Automation Conference (DAC’09); July 2009; San Francisco, CA. (22% acceptance rate)

3.      Heterogeneous Chip Multiprocessor Design, Ozcan Ozturk. Designing for embedded parallel computing platforms: architectures, tools, and applications Workshop, Design, Automation and Test in Europe (DATE'09).

4.      Using Dynamic Compilation for Continuing Execution Under Reduced Memory Availability, Ozcan Ozturk, Mahmut Kandemir. In Proc. of Design, Automation and Test in Europe (DATE'09), Nice, France, April 2009. (27% acceptance rate)

5.      Adaptive Prefetching for Shared Cache Based Chip Multiprocessors, Mahmut Kandemir, Yuanrui Zhang, Ozcan Ozturk. In Proc. of Design, Automation and Test in Europe (DATE'09), Nice, France, April 2009. (27% acceptance rate)

6.      Process Variation Aware Thread Mapping For Chip Multiprocessors by S Hong, S H K Narayanan, and M Kandemir, O Ozturk. In Proc. of Design, Automation and Test in Europe (DATE'09), Nice, France, April 2009. (27% acceptance rate)

7.      SPM Management Using Markov Chain Based Data Access Prediction, by T. Yemliha, S. Srikantaiah, M. Kandemir, and O. Ozturk. To appear In Proc. International Conference on Computer Aided Design (ICCAD'08), San Jose, CA, November 2008. (26% acceptance rate)

8.      Prefetch Throttling and Data Pinning for Improving Performance of Shared Caches by O. Ozturk, S. W. Son, M. Kandemir, and M. Karakoy. To appear in Proc. of the ACM/IEEE Conference on High Performance Networking and Computing (SC'08), Austin, TX, Nov 2008. (20% acceptance rate)

9.      Profiler and Compiler Assisted Adaptive I/OPrefetchingfor Shared Storage Caches, by S. W. Son, S.P.Muralidhara, O. Ozturk, M. Kandemir,I.Kolcu, and M.Karakoy. In Proc. International Conference on Parallel Architecture and Compilation Techniques PACT-2008Toronto,CanadaOctober 25-29, 2008. (19% acceptance rate)

10.  Software-Directed Combined CPU/Link Voltage Scaling for NoC-Based CMPs, by O. Ozturk and M. Kandemir. In Proc. the ACM SIGMETRICS (International Conference on Measurement and Modeling of Computer Systems),Annapolis, MD, June2008. (18% acceptance rate)

11.  A Scratch-Pad Memory Aware Dynamic Loop Scheduling Algorithm, by O. Ozturk, M. Kandemir, and S. H. K. Narayanan. In Proc. the9th International Symposium on Quality Electronic Design (ISQED'08),San Jose, CA, March 2008. (30% acceptance rate)

12.  An ILP Based Approach to Reducing Energy Consumption in NoC Based CMPs, by O. Ozturk, M. Kandemir, and S. W. Son. In Proc. of the International Symposium on Low Power Electronics and Design (ISLPED'07), pp. 411-414,Portland,OR, Aug 2007. (39% acceptance rate)

13.  A Memory-Conscious Code Parallelization Scheme, by L. Xue, O. Ozturk, and M. Kandemir. In Proc. of the 44th Design Automation Conference (DAC’07); June 2007;San Diego, CA. (23% acceptance rate)

14.  Reducing Off-Chip Memory Access Costs Using Data Recomputationin Embedded Chip Multi-processors; by H. Koc, M. Kandemir, E. Ercanli,O. Ozturk; In Proc. of the 44th Design Automation Conference (DAC’07); June2007; San Diego, CA. (23% acceptance rate)

15.  Memory Bank Aware Dynamic Loop Scheduling by M. Kandemir, T. Yemliha, S. W. Son, and O. Ozturk. In Proc. of Design, Automation and Test in Europe (DATE'07), Nice, France, April 2007. (22% acceptance rate)

16.  Compiler-Directed Variable Latency Aware SPM Management to Cope With Timing Problems, by O. Ozturk, M. Kandemir, and M. Karakoy. In Proc. IEEE/ACM International Symposium on Code Generation and Optimization (CGO'07),San Jose, CA, March 2007. (32% acceptance rate)

17.  An ILP Formulation for recomputation Based SPM Management for Embedded CMPs; by Hakduran Koc,Ehat Ercanli, Mahmut T. Kandemir, Ozcan Ozturk; In Proceedings of the5th Workshop on Optimizations for DSP and Embedded Systems (ODES'07); March2007; San Jose, CA. 

18.  Enhancing Locality in Two-Dimensional Space through Integrated Computation and Data Mappings, by M. Kandemir, O. Ozturk, and V.S. Degalahal. In Proc. 20th International Conference on VLSI Design (VLSI'07), Bangalore, India, January 2007.

19.  A Process Scheduler-Based Approach to NoC Power Management, by F. Li, G. Chen, M. Kandemir, O. Ozturk, M. Karakoy, R. Ramanarayanan, and B. Vaidyanathan.In Proc. 20thInternational Conference on VLSI Design (VLSI'07), Bangalore, India, January 2007.

20.  Compiler-Directed Code Restructuring for Operating with Compressed Arrays, by T. Yemliha, G. Chen, O. Ozturk, M. Kandemir, and V. S. Degalahal. In Proc. 20th International Conference on VLSI Design (VLSI'07), Bangalore, India, January 2007.

21.  Locality-Aware Distributed Loop Scheduling For Chip Multiprocessors, by L. Xue, M. Kandemir, G. Chen, F. Li, O. Ozturk, R. Ramanarayanan, and B. Vaidyanathan. In Proc. 20thInternationalConference on VLSI Design (VLSI'07),Bangalore, India, January 2007.

22.  Cache miss clustering for banked memory systems, by O. Ozturk, G. Chen, M. Kandemir, and M. Karakoy. In Proc. IEEE/ACM International Conference on Computer-Aided Design (ICCAD'06),San Jose, CA, November 2006.      

23.  Minimizing energy consumption of banked memories using data recomputation, by H. Koc, O. Ozturk, M. Kandemir, S. H. K. Narayanan, and E. Ercanli. In Proc. International Symposium on Low Power Electronics and Design (ISLPED'06), Tegernsee, Germany, October 2006.

24.  Energy-aware code replication for improving reliability in embedded chip multiprocessors, byG. Chen, O. Ozturk, and M. Kandemir. In Proc. IEEE International SOCConference (SOCC'06), Austin, TX, September 2006.

25.  A Constraint NetworkBased Solution to Code Parallelization, by O. Ozturk, G. Chen, and M.Kandemir. In Proc. Design Automation Conference (DAC'06),San Francisco, CA, July 2006.(BestPaper Candidate)

26.  Multi-level On-chipMemory Hierarchy Design for Embedded Chip Multiprocessors, by O. Ozturk, M.Kandemir, M. J. Irwin, and S. Tosun. In Proc. The Twelfth InternationalConference on Parallel and Distributed Systems (ICPADS'06), July 2006.(Best Paper Award)

27.  Selective Code/DataMigration for Reducing Communication Energy in EmbeddedMpSoCArchitectures, by O. Ozturk, M. Kandemir, and M.Karakoy.In Proc. GLSVLSI,Philadelphia,PA, May 2006.

28.  An ILP Based Approachto Address Code Generation for Digital Signal Processors, by O. Ozturk, M.Kandemir, and S. Tosun. In Proc. GLSVLSI,Philadelphia,PA,May 2006.

29.  Multi-compilation:capturing interactions among concurrently-executing applications, by O.Ozturk, G. Chen, and M. Kandemir. In Proc. ACM International Conference onComputing Frontiers,Ischia,Italy,May 2006.

30.  ILP-Based Managementof Multi-Level Memory Hierarchies, by O. Ozturk, M. Kandemir, and S. W. Son.In Proc. 4th Workshop on Optimizations for DSP and Embedded Systems(ODES'06), Manhattan, New York, NY, March, 2006.

31.  Managing SPM SpaceBased on Inter-Application Data Sharing, by O. Ozturk, M. Kandemir, S. W.Son, andI.Kolcu.In Proc. 4th Workshop on Optimizations for DSP and Embedded Systems(ODES'06), Manhattan, New York, NY, March, 2006.

32.  Dynamic Scratch-PadMemory Management for Irregular Array Access Patterns, by G. Chen, O.Ozturk, M. Kandemir, and M.Karakoy. DesignAutomation and Test in Europe (DATE'06),Munich,Germany,March 2006.

33.  Dynamic Partitioningof Processing and Memory Resources in EmbeddedMPSoCArchitectures, by L.Xue, O. Ozturk, F. Li, andI.Kolcu. Design Automation and Test in Europe (DATE'06),Munich,Germany,March 2006.

34.  Data Replication in Banked DRAMs for Reducing Energy Consumption, by O. Ozturk and M. Kandemir. In Proc. the 7th International Symposium on Quality Electronic Design (ISQED'06),San Jose,CA, March2006.

35.  Shared Scratch-Pad Memory Space Management, by O. Ozturk, M. Kandemir, andI.Kolcu. In Proc. the 7th International Symposium on Quality Electronic Design (ISQED'06),San Jose,CA,March 2006.

36.  Compiler-Directed Power Density Reduction inNoC-Based Multi-Core Designs, by S. H. K. Narayanan, O.Ozturk, and M. Kandemir. In Proc. the 7th International Symposium on QualityElectronic Design (ISQED'06),SanJose,CA, March2006.

37.  An Integer LinearProgramming Based Approach to Simultaneous Memory Space Partitioning andData Allocation for Chip Multiprocessors, by O. Ozturk, G. Chen, M.Kandemir, and M.Karakoy. In Proc. IEEE ComputerSociety Annual Symposium on VLSI 2006 (ISVLSI 2006),Karlsruhe,Germany, March, 2006.

38.  TaskRecomputationin Memory Constrained Embedded Multi-CPUSystems, by H.Koc,S. Tosun,O. Ozturk, and M. Kandemir. In Proc. IEEE Computer Society Annual Symposiumon VLSI 2006 (ISVLSI 2006),Karlsruhe,Germany, March, 2006.

39.  Leakage-Aware SPMManagement, by G. Chen, F. Li, O. Ozturk, G. Chen, M. Kandemir, andI.Kolcu. In Proc. IEEEComputer Society Annual Symposium on VLSI 2006 (ISVLSI 2006),Karlsruhe,Germany,March, 2006.

40.  Compiler-Guided DataCompression for Reducing Memory Consumption of Embedded Applications, byO.Ozturk,G.Chen,M.Kandemir. In Proc. the Asia and South Pacific DesignAutomation Conference (ASPDAC'06),Yokohama,Japan,January 2006.

41.  Optimal TopologyExploration for Application-Specific 3D Architectures, byO.Ozturk,F.Wang,M.Kandemir,Y.Xie. In Proc.the Asia and South Pacific Design Automation Conference (ASPDAC'06),Yokohama,Japan, January 2006. 

42.  IntegratingLoopand Data Optimizations for Locality within aConstraint Network Based Framework, byG.Chen,O.Ozturk,M.Kandemir, andI.Kolcu. In Proc. International Conference on ComputerAided Design (ICCAD'05),San Jose,CA, November 2005.

43.  Increasing On-ChipMemory Space Utilization for Embedded Chip Multiprocessors through DataCompression.O.Ozturk,M.Kandemir,M.J.Irwin. In Proc. IEEE/ACM/IFIP InternationalConference on Hardware/SoftwareCodesignandSystem Synthesis (CODES+ISSS'05),New York, September 2005.

44.  On-Chip MemoryManagement for EmbeddedMpSoCArchitectures Basedon Data Compression.O.Ozturk,M.Kandemir,M.J.Irwin. InProc. IEEE International SOC Conference (SOCC 2005),Washington,D.C.,September 2005.

45.  Workload Clusteringfor Increasing Energy Savings on EmbeddedMPSoCs,S.H.K.Narayan,O.Ozturk,M.Kandemir,M.Karakoy.In Proc. IEEE International SOC Conference (SOCC 2005),Washington,D.C.,September 2005.

46.  Constraint-Based CodeMapping for Heterogeneous Chip Multiprocessors, S. Tosun, N.Mansouri, M. Kandemir, O. Ozturk. In Proc. IEEEInternational SOC Conference (SOCC 2005),Washington,D.C.,September 2005.

47.  ExploitingInter-Processor Data Sharing for Improving Behavior of Multi-ProcessorSoCs, byG.Chen,G.Chen,O.Ozturk, andM.Kandemir. In Proc. IEEE Computer Society AnnualSymposium on VLSI 2005 (ISVLSI 2005),Tampa,Florida, May 11-12, 2005.

48.  A Data-Driven Approachfor Embedded Security, byH.Saputra,O.Ozturk,N.Vijaykrishnan,M.Kandemir, andR.Brooks. InProc. IEEE Computer Society Annual Symposium on VLSI 2005 (ISVLSI 2005),Tampa,Florida,May 11-12, 2005.

49.  Energy management insoftware-controlled multi-level memory hierarchies, byO.OzturkandM.Kandemir. In Proc. GLSVLSI'05,Chicago,IL,April 2005.

50.  Integer linearprogramming based energy optimization for bankedDRAMs,byO.OzturkandM.Kandemir.In Proc. GLSVLSI'05,Chicago,IL, April 2005.

51.  Using data compressionin anMPSoCarchitecture for improvingperformance, byO.Ozturk,M.Kandemir, andM.J.Irwin. InProc. GLSVLSI'05,Chicago,IL, April 2005.

52.  Access pattern-basedcode compression for memory-constrained embedded systems, byO.Ozturk,H.Saputra,M.Kandemir, andI.Kolcu. InProc. Design Automation and Test in Europe Conference (DATE'05),Munich,Germany, March 2005.

53.  BB-GC: basic-blocklevel garbage collection, byO.Ozturk,M.KandemirandM.J.Irwin. InProc. Design Automation and Test in Europe Conference (DATE'05),Munich,Germany, March 2005.

54.  Nonuniformbanking for reducingmemory energy consumption, byO.OzturkandM.Kandemir. In Proc. Design Automation and Test inEurope Conference (DATE'05),Munich,Germany,March 2005.

55.  Increasing registerfile immunity to transient errors, byG.Memik,M.Kandemir, andO.Ozturk. InProc. Design Automation and Test in Europe Conference (DATE'05),Munich,Germany, March 2005.

56.  Studying storage-recomputationtradeoffs in memory-constrained embeddedprocessing, byM.Kandemir,F.Li,G.Chen,G.Chen, andO.Ozturk. In Proc. Design Automation and Test in EuropeConference (DATE'05),Munich,Germany,March 2005.

57.  An ILP formulation forreliability-oriented high-level synthesis, byS.Tosun,O.Ozturk,N.Mansouri,E.Arvas,M.Kandemir, andY.Xie. In Proc. the 6th International Symposium onQuality Electronic Design (ISQED'05),San Jose,CA, March2005.

58.  An adaptivelocality-conscious process scheduler for embedded systems, byG.Chen,G.Chen,O.Ozturk, andM.Kandemir. InProc. 11th IEEE Real-Time and Embedded Technology and Applications Symposium(RTAS'05), San Francisco, California, March 2005

59.  Customized on-chipmemories for embedded chip multiprocessors, byO.Ozturk,M.Kandemir,G.Chen,M.J.Irwin, andM.Karakoy. InProc. the Asia and South Pacific Design Automation Conference (ASPDAC'05),Shanghai,China, January 2005. 

60.  Dynamic on-chip memorymanagement for chip multiprocessors, byM.Kandemir,O.Ozturk, andM.Karakoy.In Proc. International Conference on Compilers, Architectures, and Synthesisfor Embedded Systems (CASES'04),WashingtonD.C.,September2004.

61.  Data compression forimproving SPM behavior, byO.Ozturk,M.Kandemir,I.Demirkiran,G.Chen, andM.J.Irwin. InProc. the 41st Design Automation Conference (DAC'04),San Diego, CA, June 2004.(Best PaperCandidate)

62.  Tuning datareplication for improving behavior ofMPSoCapplications, byO.Ozturk,M.Kandemir,M.J.Irwin, andI.Kolcu.In Proc. the 2004 Great Lakes Symposium on VLSI (GLSVLSI'04),Boston,MA,April 26-28, 2004.