Department of Computer Engineering
S E M I N A R
ILP-Based Communication Reduction for Heterogeneous 3D Network-on-Chips
Can Ufuk Hantaş
Computer Engineering Department
Network-on-Chip (NoC) architectures and three-dimensional integrated circuits (3D ICs) have been introduced as attractive options for overcoming the barriers in interconnect scaling while increasing the number of cores. Combining these two approaches is expected to yield better performance and higher scalability. This paper explores the possibility of combining these two techniques in a heterogeneity aware fashion. Specifically, on a heterogeneous 3D NoC architecture, we explore how different types of processors can be placed to minimize data access costs. Our preliminary results indicate that the proposed approach generates promising results and the solution times it takes are not excessive.
DATE: 02 May, 2011, Monday @ 16:15