Bilkent University
Department of Computer Engineering


Embedded Systems in Intelligent Transportation Systems


Prof. Smail Niar
University of Valenciennes & CNRS, France

Traditionally, performance improvements have been achieved through increasing the clock frequency of the processors as faster transistors have been provided. However, the impact of power consumption, on system's reliability and cooling limited employing those techniques for further performance improvements

Two ways for increasing energy efficiency in embedded and communicating systems and for exploiting billions of transistors on a single chip are by the use of Multiprocessor Systems-on-Chip (MPSoC) or many core architectures in one side and customized-reconfigurable hardware components in the other side.

The combination, or hybridization, of these 2 techniques guarantees application-functional requirements and time-to-market while reducing power and energy consumption. During the last few years, the utilization of hardware accelerator, in the form of configurable hardware (namely FPGA) and the use of GPUs for accelerating general-purpose applications has been advocated by several research projects and chipmakers. In this presentation, I will talk about existing approaches for the design of embedded systems and their architectures for Intelligent Transportation Systems and Advanced Driver Assistant Systems (ADAS).

In this talk, the use of dynamic and partial reconfiguration to modify the HW will be explored. The purpose is to dynamically and automatically tune the system architecture to match the characteristics of the operational environment. Finally, an outlook on further key research issues in communicating embedded systems design to support the future "secured and mobile society" will be discussed

Bio: Pr. Smail Niar (University of Valenciennes & CNRS, France) received his PhD in computer Engineering from the University of Lille in 1990. Since then, he has been professor at the University of Valenciennes where leads the Mobile & Embedded Systems" research group at the Laboratory of Automation, Mechanical and Computer Engineering, a joint research unit between CNRS and the university of Valenciennes. He is member of the European Network of Excellence on HIgh Performance and Embedded Architectures and Compilation (HIPEAC). His research interests are in multi-processor system-on-chip (MPSoC) architectures, power/energy consumption optimization, dynamically reconfigurable embedded systems (FPGA), simulation acceleration techniques for MPSoC design space exploration, and reliability and security issues for embedded systems.


DATE: 27 October 2016, Thursday @ 13:40