Department of Computer Engineering
CS 590 SEMINAR
A Template-Based Design Methodology for Graph-Parallel Hardware Accelerators using Source to Source Transformation
Cemil Kaan Akyol
Computer Engineering Department
Graph applications have been gaining importance in the last decade due to emerging big data analytics problems such as Web graphs, social networks, and biological networks. For these applications, traditional CPU and GPU architectures suffer in terms of performance and power consumption due to irregular communications, random memory accesses, and load balancing problems. We present a template-based methodology specifically targeted for hardware accelerator design of big-data graph applications which can possibly lead to significant power and performance improvements. The SystemC-based template we provide can be customized easily to design hardware accelerators for different vertex-centric applications by inserting application-level data structures and functions. By using only graph-parallel applications implemented in C++, we automatize this process. Finally, SystemC-based template will be generated and hardware accelerators will be designed.
DATE: 26 March, 2018, Monday, CS590 & CS690 presentations begin at @ 15:40