Department of Computer Engineering
CS 590 SEMINAR
Implementation of PageRank on FPGA using High-Level Synthesis
Computer Engineering Department
PageRank is an important algorithm that powers Google and many other search engines all around the world. Due to the ever increasing nature of the internet it must be run frequently. Due to the scale of the data at hand the algorithm must be run on a large scale environment and even a small optimization can have a considerable impact on the overall execution. Over the years there have been many proposals to improve the performance or make it easier to parallelize, and recently with the increasing availability of GPUs, there are also papers proposing algorithms for PageRank on GPU. Unlike the existing papers that aims to improve the speed of the algorithm, in this study we are aiming to reduce the power cost of the algorithm by implementing it on an FPGA. Since FPGA chips are programmable to the problem at hand it is quite possible to reach a speed better than a CPU while requiring significantly less power.
DATE: 12 November, 2018, Monday, CS590 presentations begin at @ 15:40