Energy efficient processor architectures for big data graph
applications (Principal Investigator, funded by the Scientific and Technological Research
Council of Turkey)
High level design methodology for developing graph algorithms on Xeon + FPGA platforms (Principal Investigator, funded by Intel)
Optimizing memory access locality for large-scale graph applications (in collaboration with Intel)
Parallelizing Collaborative Filtering algorithms for
recommender systems
Parallel and vectorized scientific computing algorithms for
emerging applications
Improving efficiency of genome alignment algorithms for new
Intel architectures