CS 423 - Computer Architecture


Lecture Contents (Tentative)

Begins

Lecture Contents

Lecture Slides

Feb 6th

  • Introduction

Set1

Feb 13th

  • MIPS ISA
  • MIPS ALU
  • Understanding performance 

Set2

Feb 20th

  • MIPS basic architecture
  • Pipelining MIPS 
  • Dealing with data hazards
  • Reducing branch costs

Set3

HW1 out

Feb 27th

  • Intro to superscalar

HW1 in

Mar 5th

  • A MIPS SS processor model

Set4

HW2 out

Mar 12th

  • SS processor model
  • SS front end issues

Set5

Mar 19th

  • SS backend issues
  • VLIW architectures

HW2 in

Set6

Mar 26th

  • Midterm on Monday, March 26th during regular class hours 10:40-12:00 in EB204.
  • Memory

Set7

Midterm

HW3 out

Apr 2nd

  • Memory
  • Introduction to Multiprocessors 

Set8

Apr 9th

  • Cache Coherency
  • The March to Multicore & Manycore
  • Power Efficiency, DRAM Access Latency

Set9

Apr 16th

  • Multicore programming: Shared Memory Systems
  • CMP Architecture

HW3 in

Set10

Apr 23rd

  • No Class on Monday, April 23rd
  • Parallel Programming Concepts

Set11

OpenMP

Apr 30th

  • No Class on Tuesday, May 1st 
  • Design Choices
  • Intel, AMD, IBM, On-chip Cache Hierarchy

Set 12

May 7th

  • Research Topics

HW4 out scientific_sequential.c

Set 13

May 14th

  • Tuesday, May 15th is the last day of classes
  • Final on Wednesday, May 16th at 1:00PM

HW4 in